A 4-channel 12-bit high-voltage radiation-hardened digital-to-analog converter for low orbit satellite applications

Fan, H., Li, D., Kelin, Z., Cen, Y., Feng, Q., Qiao, F. and Heidari, H. (2018) A 4-channel 12-bit high-voltage radiation-hardened digital-to-analog converter for low orbit satellite applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(11), pp. 3698-3706. (doi: 10.1109/TCSI.2018.2856851)

Abstract

This paper presents a circuit design and an implementation of a four-channel 12-bit digital-to-analog converter (DAC) with high-voltage operation and radiation-tolerant attribute using a specific CSMC H8312 0.5-μm Bi-CMOS technology to achieve the functionality across a wide-temperature range from -55 °C to 125 °C. In this paper, an R-2R resistor network is adopted in the DAC to provide necessary resistors matching which improves the DAC precision and linearity with both the global common centroid and local common centroid layout. Therefore, no additional, complicated digital calibration or laser-trimming are needed in this design. The experimental and measurement results show that the maximum frequency of the single-chip four-channel 12-bit R-2R ladder high-voltage radiation-tolerant DAC is 100 kHz, and the designed DAC achieves the maximum value of differential non-linearity of 0.18 LSB, and the maximum value of integral non-linearity of -0.53 LSB at 125 °C, which is close to the optimal DAC performance. The performance of the proposed DAC keeps constant over the whole temperature range from -55 °C to 125 °C. Furthermore, an enhanced radiation-hardened design has been demonstrated by utilizing a radiation chamber experimental setup. The fabricated radiation-tolerant DAC chipset occupies a die area of 7 mm x 7 mm in total including pads (core active area of 4 mm x 5 mm excluding pads) and consumes less than 525 mW, output voltage ranges from -10 to +10 V.

• Item Type: Articles
• Additional Information: The work of H. Fan was supported in part by the National Natural Science Foundation of China (NSFC) under Grant 61771111, in part by the China Postdoctoral Science Foundation under Grant 2017M612940, and in part by the Special Foundation of Sichuan Provincial Postdoctoral Science Foundation. The work of Q. Feng was supported in part by the NSFC under Grant 61531016, in part by the Science and Technology Support Program of Sichuan Province under Grant 2018GZ0139, and in part by the Sichuan Provincial Science and Technology Important Projects under Grant 2017GZ0110. The work of H. Heidari was supported by the Glasgow Knowledge Exchange Fund 2017/18 at the University of Glasgow, U.K.
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Heidari, Professor Hadi
• Authors: Fan, H., Li, D., Kelin, Z., Cen, Y., Feng, Q., Qiao, F., and Heidari, H.
• College/School: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• Journal Name: IEEE Transactions on Circuits and Systems I: Regular Papers
• Publisher: IEEE
• ISSN: 1549-8328
• ISSN (Online): 1558-0806
• Published Online: 17 August 2018
• Copyright Holders: Copyright © 2018 IEEE
• First Published: First published in IEEE Transactions on Circuits and Systems I: Regular Papers 65(11): 3698-3706
• Publisher Policy: Reproduced in accordance with the publisher copyright policy