High Linearity SAR ADC for Smart Sensor Applications

Fan, H., Yang, J., Maloberti, F., Feng, Q., Li, D., Hu, D., Cen, Y. and Heidari, H. (2018) High Linearity SAR ADC for Smart Sensor Applications. In: IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 27-20 May 2018, ISBN 9781538648810 (doi:10.1109/ISCAS.2018.8350998)

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Abstract

This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor application. Monte Carlo simulation results show that capacitive array optimization technique proposed can make the SFDR, SNDR and (Signal-to-Noise Ratio) SNR more concentrated, which means the differences between maximum value and minimum value of SFDR, SNDR and SNR are much smaller than the conventional calibration techniques, more stable performance enhancement can be achieved, and the averaged SFDR is improved from 72.9 dB to 91.1 dB by using the capacitive array optimization method, 18.2 dB improvement of SFDR is obtained with only little expense of digital logic circuits, which makes it good choice for high resolution and high linearity smart sensing systems.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Heidari, Dr Hadi
Authors: Fan, H., Yang, J., Maloberti, F., Feng, Q., Li, D., Hu, D., Cen, Y., and Heidari, H.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
ISSN:2379-447X
ISBN:9781538648810
Copyright Holders:Copyright © 2018 IEEE
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher
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