Vairagar, A.V., Patil, S.B. and Pete, D.J. (2002) Suppression of Boron Penetration by Hot Wire CVD Polysilicon. In: 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2002), Singapore, 8-12 July 2002, pp. 223-226. ISBN 0780374169 (doi: 10.1109/IPFA.2002.1025667)
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Abstract
In the current and future deep sub-micron technologies, boron penetration through the gate dielectric is a severe reliability concern for the dual gate CMOS technology. In this paper we report results of our attempts to exploit the potential of Hot Wire CVD (HWCVD) for depositing poly-Si gate for CMOS technology. The effect of grain size of poly-Si gate on boron penetration is studied by varying the poly-Si grain size through variation in the HWCVD parameters.
Item Type: | Conference Proceedings |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Patil, Dr Samadhan |
Authors: | Vairagar, A.V., Patil, S.B., and Pete, D.J. |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
ISBN: | 0780374169 |
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