Study of RF linearity in sub-50nm MOSFETs using simulations

Ma, W., Kaya, S. and Asenov, A. (2003) Study of RF linearity in sub-50nm MOSFETs using simulations. Journal of Computational Electronics, 2(2-4), pp. 347-352. (doi: 10.1023/B:JCEL.0000011450.37111.9d)

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Abstract

We investigate the linearity performance of dual-gate and fully-depleted silicon-on-insulator MOSFETs through use of 2D computer simulations, which take into account quantum mechanical considerations and non-equilibrium transport effects. We show that DG MOSFET is superior not only in terms of g m /I d characteristics, central to analog performance, but also in terms of linearity performance, by up to 5 dBm, in most operating conditions. Linearity figures of devices considered in this work range from –10 to –20 dBm, which answer the needs of mobile communication standards currently in use. We also observe that, when properly scaled, bulk MOSFETs display competitive analog performance and have third-order intercept figures very similar to SOI device. We can identify, through simulation experiments, that quantum mechanical effects have positive impact on linearity, while non-equilibrium conditions lower linearity performance. With increasing drain bias, we find that linearity saturates at a moderately low voltage (sim1 V) in all devices.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Asenov, Professor Asen
Authors: Ma, W., Kaya, S., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Journal of Computational Electronics
ISSN:1569-8025
ISSN (Online):1572-8137
Published Online:02 November 2004

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