An intelligible implementation of FastSLAM2.0 on a low-power embedded architecture

Jiménez Serrata, A. A., Yang, S. and Li, R. (2017) An intelligible implementation of FastSLAM2.0 on a low-power embedded architecture. EURASIP Journal on Embedded Systems, 2017(1), 27. (doi:10.1186/s13639-017-0075-9)

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Abstract

The simultaneous localisation and mapping (SLAM) algorithm has drawn increasing interests in autonomous robotic systems. However, SLAM has not been widely explored in embedded system design spaces yet due to the limitation of processing recourses in embedded systems. Especially when landmarks are not identifiable, the amount of computer processing will dramatically increase due to unknown data association. In this work, we propose an intelligible SLAM solution for an embedded processing platform to reduce computer processing time using a low-variance resampling technique. Our prototype includes a low-cost pixy camera, a Robot kit with L298N motor board and Raspberry Pi V2.0. Our prototype is able to recognise artificial landmarks in a real environment with an average 75% of identified landmarks in corner detection and corridor detection with only average 1.14 W.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Yang, Dr Shufan
Authors: Jiménez Serrata, A. A., Yang, S., and Li, R.
College/School:College of Science and Engineering > School of Engineering
Journal Name:EURASIP Journal on Embedded Systems
Publisher:Springer
ISSN:1687-3963
ISSN (Online):1687-3963
Published Online:02 March 2017
Copyright Holders:Copyright © 2017 The Authors
First Published:First published in
Publisher Policy:Reproduced under a Creative Commons License

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