Plasma Processing of III-V Materials for Energy Efficient Electronics Applications

Thayne, I. , Li, X. , Millar, D., Fu, Y.-C. and Peralagu, U. (2017) Plasma Processing of III-V Materials for Energy Efficient Electronics Applications. In: Advanced Etch Technology for Nanopatterning VI, San Jose, CA, USA, 27 Feb - 01 Mar 2017, 101490R. (doi:10.1117/12.2257863)

Thayne, I. , Li, X. , Millar, D., Fu, Y.-C. and Peralagu, U. (2017) Plasma Processing of III-V Materials for Energy Efficient Electronics Applications. In: Advanced Etch Technology for Nanopatterning VI, San Jose, CA, USA, 27 Feb - 01 Mar 2017, 101490R. (doi:10.1117/12.2257863)

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Abstract

This paper reviews some recent activity at the James Watt Nanofabrication Centre in the University of Glasgow in the area of plasma processing for energy efficient compound semiconductor-based transistors. Atomic layer etching suitable for controllable recess etching in GaN power transistors will be discussed. In addition, plasma based surface passivation techniques will be reviewed for a variety of compound semiconductor materials ((100) and (110) oriented InGaAs and InGaSb).

Item Type:Conference Proceedings
Additional Information:SPIE Advanced Lithography Conference
Keywords:Compound semiconductors, atomic layer etching, plasma-based surface passivation.
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Fu, Mr Yen-Chun and Li, Dr Xu and Thayne, Professor Iain and Peralagu, Mr Uthayasankaran
Authors: Thayne, I., Li, X., Millar, D., Fu, Y.-C., and Peralagu, U.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
College of Science and Engineering > School of Engineering > James Watt Nanofabrication Centre
Research Group:Micro- and Nanotechnology
ISSN:0277-786X
Published Online:21 March 2017
Copyright Holders:Copyright © 2017 SPIE
First Published:First published in Proceedings of SPIE 10149: 10149R
Publisher Policy:Reproduced in accordance with the publisher copyright policy

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
600761Silicon Compatible GaN Power ElectronicsIain ThayneEngineering & Physical Sciences Research Council (EPSRC)EP/K014471/1ENG - ENGINEERING ELECTRONICS & NANO ENG
703781INSIGHTIain ThayneEuropean Commission (EC)688784ENG - ENGINEERING ELECTRONICS & NANO ENG