New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications

Jiang, X., Guo, S., Wang, R., Wang, Y., Wang, X., Cheng, B., Asenov, A. and Huang, R. (2017) New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications. In: 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 03-07 Dec 2016, 28.4.1-28.4.4. ISBN 9781509039029 (doi: 10.1109/IEDM.2016.7838499)

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Abstract

Energy consumption has become the major concern of the IC industry. As a result, near-threshold-voltage (NTV) design has attracted a lot of attention for its superiority in energy efficiency. However, NTV design is faced with the key challenge - variability, especially for FinFET technology where device electrical FoMs are found to be strongly correlated. In this paper, new methodology of NTV design optimization for FinFET is proposed for the first time, and demonstrated based on silicon data. Significant improvements are achieved in the following three aspects: (1) Our newly proposed predictive compact variability models in all-region are accurately calibrated with experimental data, using a simple characterization method; (2) A new efficient approach for logic design space optimization is proposed based on a set of elaborately selected subthreshold FoMs, and the impacts of variation on energy efficiency, delay variation and failure probability are thoroughly investigated; (3) The conventional gate sizing method is also ameliorated specifically for FinFET NTV design. Based on silicon data, the proposed methodology is then demonstrated under Vdd=199mV and Vdd=145mV, targeting energy-efficiency priority and Vdd priority scenarios, respectively. This work provides helpful guidelines for FinFET variation-aware near-threshold design.

Item Type:Conference Proceedings
Additional Information:This work was supported in part by the NSFC (61522402 and 61421005) and 863 Project (2015AA016601).
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Wang, Dr Xingsheng and Asenov, Professor Asen and Cheng, Dr Binjie
Authors: Jiang, X., Guo, S., Wang, R., Wang, Y., Wang, X., Cheng, B., Asenov, A., and Huang, R.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
ISSN:2156-017X
ISBN:9781509039029
Published Online:02 February 2017

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