Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels

Georgiev, V. P. , Mirza, M. M. , Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A. , Asenov, A. and Paul, D. J. (2017) Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels. IEEE Transactions on Nanotechnology, 16(5), pp. 727-735. (doi:10.1109/TNANO.2017.2665691)

[img]
Preview
Text
136313.pdf - Published Version
Available under License Creative Commons Attribution.

1MB

Abstract

The experimental results from 8 nm diameter silicon nanowire junctionless field effect transistors with gate lengths of 150 nm are presented that demonstrate on-currents up to 1.15 mA/m for 1.0 V and 2.52 mA/m for 1.8 V gate overdrive with an off-current set at 100 nA/m. On- to off-current ratios above 108 with a subthreshold slope of 66 mV/dec are demonstrated at 25 oC. Simulations using drift-diffusion which include densitygradient quantum corrections provide excellent agreement with the experimental results. The simulations demonstrate that the present silicon-dioxide gate dielectric only allows the gate to be scaled to 25 nm length before short-channel effects significantly reduce the performance. If high-K dielectrics replace some parts of the silicon dioxide then the technology can be scaled to at least 10 nm gatelength.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Towie, Dr Ewan and Asenov, Professor Asen and Mirza, Dr Muhammad M A and Riddet, Mr Craig and Paul, Professor Douglas and Dochioiu, Mr Alexandru-Iusti and MacLaren, Dr Donald and Amoroso, Dr Salvatore and Georgiev, Dr Vihar
Authors: Georgiev, V. P., Mirza, M. M., Dochioiu, A.-I., Lema, F.-A., Amoroso, S. M., Towie, E., Riddet, C., MacLaren, D. A., Asenov, A., and Paul, D. J.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
College of Science and Engineering > School of Physics and Astronomy
Journal Name:IEEE Transactions on Nanotechnology
Publisher:Institute of Electrical and Electronics Engineers
ISSN:1536-125X
ISSN (Online):1941-0085
ISBN:9781509043521
Published Online:08 February 2017
Copyright Holders:Copyright © 2017 The Authors
First Published:First published in IEEE Transactions on Nanotechnology 16(5): 727-735
Publisher Policy:Reproduced under a Creative Commons license
Data DOI:10.5525/gla.researchdata.388

University Staff: Request a correction | Enlighten Editors: Update this record

Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
694301Engineering Quantum Technology Systems on a Silicon PlatformDouglas PaulEngineering & Physical Sciences Research Council (EPSRC)EP/N003225/1ENG - ENGINEERING ELECTRONICS & NANO ENG
703701SUPERAID7Asen AsenovEuropean Commission (EC)688101ENG - ENGINEERING ELECTRONICS & NANO ENG