Impact of quantum confinement on transport and the electrostatic driven performance of silicon nanowire transistors at the scaling limit

Al-Ameri, T. , Georgiev, V. P. , Sadi, T., Wang, Y., Adamu-Lema, F., Wang, X., Amoroso, S. M., Towie, E., Brown, A. and Asenov, A. (2017) Impact of quantum confinement on transport and the electrostatic driven performance of silicon nanowire transistors at the scaling limit. Solid-State Electronics, 129, pp. 73-80. (doi: 10.1016/j.sse.2016.12.015)

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Abstract

In this work we investigate the impact of quantum mechanical effects on the device performance of n-type silicon nanowire transistors (NWT) for possible future CMOS applications at the scaling limit. For the purpose of this paper, we created Si NWTs with two channel crystallographic orientations <110> and <100> and six different cross-section profiles. In the first part, we study the impact of quantum corrections on the gate capacitance and mobile charge in the channel. The mobile charge to gate capacitance ratio, which is an indicator of the intrinsic performance of the NWTs, is also investigated. The influence of the rotating of the NWTs cross-sectional geometry by 90o on charge distribution in the channel is also studied. We compare the correlation between the charge profile in the channel and cross-sectional dimension for circular transistor with four different cross-sections diameters: 5nm, 6nm, 7nm and 8nm. In the second part of this paper, we expand the computational study by including different gate lengths for some of the Si NWTs. As a result, we establish a correlation between the mobile charge distribution in the channel and the gate capacitance, drain-induced barrier lowering (DIBL) and the subthreshold slope (SS). All calculations are based on a quantum mechanical description of the mobile charge distribution in the channel. This description is based on the solution of the Schrödinger equation in NWT cross sections along the current path, which is mandatory for nanowires with such ultra-scale dimensions.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Towie, Dr Ewan and Sadi, Dr Toufik and Amoroso, Dr Salvatore and Georgiev, Dr Vihar and Wang, Miss Yijiao and Wang, Dr Xingsheng and Asenov, Professor Asen and Al-Ameri, Talib Mahmood Ali and Adamu-Lema, Dr Fikru
Authors: Al-Ameri, T., Georgiev, V. P., Sadi, T., Wang, Y., Adamu-Lema, F., Wang, X., Amoroso, S. M., Towie, E., Brown, A., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Solid-State Electronics
Publisher:Elsevier
ISSN:0038-1101
ISSN (Online):1879-2405
Published Online:28 December 2016
Copyright Holders:Copyright © 2016 Elsevier
First Published:First published in Solid-State Electronics 129:73-80
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher

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