Top‐Down Fabricated Silicon Nanowire Junctionless Transistors

Schupp, F. J., Mirza, M. M. , MacLaren, D. A. , Briggs, A. A.D., Mol, J. A. and Paul, D. J. (2016) Top‐Down Fabricated Silicon Nanowire Junctionless Transistors. Silicon Quantum Electronics Workshop, Delft, Netherlands, 13-14 Jun 2016.

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Silicon nanowires have potential uses in a wide range of devices and applications including transistors, qubits, photovoltaics, thermoelectric generators, and photodetectors. Understanding the electronic transport properties of nanowires is therefore essential for the optimization and fabrication of high performing devices. Nanowire transistors made from an etched (quasi‐)one‐dimensional silicon channel that is covered by a wrap‐around gate, provide better electrostatic control of the channel than planar or tri‐gate transistors and further mitigate short‐channel effects. If scaled sufficiently such that quantum confinement dominates over thermal energy, these transistors have the potential for room temperature single‐electron transport. To date, the most advanced nanowire transistor design consists of an undoped channel connected to a heavily doped source and drain contact, and operates in accumulation mode. I will present nanowire transistors that operate in depletion mode and consist of a junctionless nanowire with uniform doping concentration in the channel and source/drain contacts.

Item Type:Conference or Workshop Item
Glasgow Author(s) Enlighten ID:Mirza, Dr Muhammad M A and Paul, Professor Douglas and MacLaren, Dr Donald
Authors: Schupp, F. J., Mirza, M. M., MacLaren, D. A., Briggs, A. A.D., Mol, J. A., and Paul, D. J.
Subjects:Q Science > QC Physics
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
College of Science and Engineering > School of Physics and Astronomy
Research Group:Semiconductor Device Group and James Watt Nanofabrication Centre
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