Nabi, S. W. and Vanderbauwhede, W. (2016) Using Type Transformations to Generate Program Variants for FPGA Design Space Exploration. In: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexico City, Mexico, 7-9 Dec 2015, pp. 1-6. ISBN 9781467394055 (doi: 10.1109/ReConFig.2015.7393365)
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Abstract
We present preliminary results with the TyTra design flow. Our aim is to create a parallelising compiler for high-performance scientific code on heterogeneous platforms, with a focus on Field-Programmable Gate Arrays (FPGAs). Using the functional language Idris, we show how this programming paradigm facilitates generation of different correct-by-construction program variants through type transformations. We have developed a custom Intermediate Representation (IR) language, the TyTra-IR, which is similar to the LLVM IR, with extensions to express parallelism, allowing us to designs variants associated with each program variant. The key innovation of the TyTra-IR is the ability to construct and cost design variants for FPGAs. Our prototype compiler generates Verilog code for FPGA synthesis from a given IR description. Using a real-world Successive Over-Relaxation (SOR) kernel, we illustrate generation of program variants in Idris, their representation in TyTra-IR, and evaluation of variants using our cost-model. We compare the estimates from the cost-model with results from synthesis and simulation of equivalent HDL.
Item Type: | Conference Proceedings |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Vanderbauwhede, Professor Wim and Nabi, Dr Syed Waqar |
Authors: | Nabi, S. W., and Vanderbauwhede, W. |
College/School: | College of Science and Engineering > School of Computing Science |
ISBN: | 9781467394055 |
Copyright Holders: | Copyright © 2015 IEEE |
Publisher Policy: | Reproduced in accordance with the copyright policy of the publisher. |
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