GaAs FET characterization in a quasi-monolithic Si environment

Wasige, E. , Kompa, G., Van Raay, F., Scholz, W., Rangelow, I.W., Kassing, R., Bertram, S. and Hudek, P. (1999) GaAs FET characterization in a quasi-monolithic Si environment. In: 1999 IEEE MTT-S International Microwave Symposium, Anaheim, CA, USA, 13-19 Jun 1999, pp. 1889-1891. ISBN 0780351355 (doi: 10.1109/MWSYM.1999.780342)

Abstract

GaAs FET chips are planar embedded in a high resistivity silicon substrate and characterized up to 40 GHz in a coplanar environment. Hybrid interconnects (bonding wires) are replaced by thin film ones (air bridges). Small signal equivalent circuit extraction results confirm the expected low parasitic inductance values. These are reduced by more than 50% of the typical bonding wire interconnects.

• Item Type: Conference Proceedings
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Wasige, Professor Edward
• Authors: Wasige, E., Kompa, G., Van Raay, F., Scholz, W., Rangelow, I.W., Kassing, R., Bertram, S., and Hudek, P.
• College/School: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• ISBN: 0780351355